1. Field of the Invention
The present invention relates to semiconductor nonvolatile memory and, more particularly, to reduction of the applied programming voltage to write and erase information therein.
2. Description of the Prior Art
Floating gate type memory is well known to be useful as the semiconductor nonvolatile memory (E2PROM). FIG. 1 schematically illustrates in section the construction of a prior art memory cell 1 of a floating gate type memory.
Referring to FIG. 1, there is formed a silicon substrate with a p-type silicon well 12 formed therein. A channel region 14 is formed from an n+drain 8 and an n+ source 10 provided within the well 12. On top of the silicon well 12 there are formed a silicon dioxide film 2, a polysilicon layer 4 on top of film 2 and a silicon dioxide film 5 on top of layer 4. Further on top of film 5 there is formed a polysilicon control gate electrode 6. The silicon dioxide film 2 has a thin portion 2a on top of drain 8 and the thickness of the portion 2a is 10 nm.
Information can be written and erased into and from the memory cell 1 constructed as described above by electricity. The memory cell 1 has two stable information states: one in which a logic “0” has been written therein and the other in which the logic “0” has been erased and a logic “1” has been stored. The fact that the memory cell 1 can take the two stable states is utilized for fabrication of a memory.
Operation of writing and erasing information into and from the memory cell 1 will be described below. To write a logic “0” into the memory cell 1, a high voltage which may be as much as approximately 20 voltage is applied to the drain 8 of the memory cell 1 relative to the gate electrode 6. As a result of application of this voltage, an electric field develops between the gate electrode 6 and the drain 8 which causes some of electrons within the polysilicon layer 4 to tunnel through the portion 2a and enter the drain 8. This means that the memory cell 1 has the logic “0” written. The memory cell 1 with the logic “0” serves as a transistor with the lower threshold voltage. “Threshold voltage” is a gate voltage at which a current begins to flow between the source and the drain when the voltage applied to the gate electrode relative to the source is made to increase.
Meanwhile, to erase the logic “0” from the memory cell 1 and store the logic “1” therein, some of electrons within the drain 8 need injecting into the polysilicon layer 4. This is effected by generating an electric field of the opposite polarity to that produced when writing the logic “0” by applying a voltage of approximately 20 V to the gate electrode 6 relative to the drain 8 thereof. In this stable state in which the logic “0” is erase from the memory cell or the logic “1” is stored therein, the memory cell 1 serves as a transistor with the higher threshold voltage.
Next, the operation of reading information from the memory cell 1 will be described. It is decided whether a logic “0” is stored or a logic “1” is stored in each memory cell by determining whether or not current flows through the channel region 14 when a voltage of some 5 V is applied between the source 10 and the drain 8 of the memory cell 1 and no gate voltage is applied to gate 6.
More specifically, Since the memory cell 1 with a logic “0” behaves like a transistor with the lower threshold voltage as described above, and the applied gate voltage of 0 volts exceeds the lower threshold voltage there flows current through the channel region 14. Meanwhile, when a logic “1” is stored in the memory cell 1, the memory cell 1 behaves like a transistor with the higher threshold voltage as described above, and the applied gate voltage of 0 volts does not exceed the higher threshold voltage. Thus no current flows through the channel region 14.
A semiconductor nonvolatile memory may be constructed by using memory cells such as described above coupled with read and write control transistor.
The above-mentioned nonvolatile semiconductor memory device has the following problem.
With progress of the semiconductor industry, the need for integrated nonvolatile semiconductor memories has arisen. The memories have had difficulties in further integration thereof. One of the difficulties is that the memory requires a highly insulated structure. That is because an applied programming voltage can destroy the device when the device does not have the highly insulated structure. Avoidance of the destruction is effected by reduction in applied programming voltage.
However, to write information into the memory, electrons need moving from the polysilicon layer 4 to the drain 8 through the silicon dioxide film portion 2a. More specifically, a certain electric field strength or more has to be applied to the portion 2a so that the electrons could tunnel through the portion 2a. 
Meanwhile when the programming write voltage is applied to the gate of the memory cell 1 constructed as described above relative to the drain, the electric field strength applied to the portion 2a is given by   E  =                    C1        +        C3                    L        ×                  (                      C1            +            C2            +            C3                    )                      ⁢    V    ⁢                   ⁢    s  where C1, C2 and C3 are an electric capacity between the polysilicon layer 4 and the polysilicon layer 6, an electric capacity between the polysilicon layer 4 and the drain 8 and an electric capacity between the polysilicon layer 4 and the p-type well 12, respectively. L is the thickness of the porion 2a of the silicon dioxide film.
Accordingly, when silicon dioxide is used as insulating layer, electric capacities C1, C2 and C3 are substantially same in the equation. Therefore, to make necessary electric field strength apply to the portion 2a, a thinner silicon dioxide film portion 2a has to be used or a high voltage which may be as much as 20 volts has to be applied to the gate 6. Because technology could limit the thinner silicon dioxide film portion 2a the high voltage of approximately 20 volts is necessary to write information in the memory cell. That limits reduction in the programming write voltage.